From: Stefen Boyd (stefen@boyd.com)
Date: Thu Oct 16 2003 - 16:01:47 PDT
>Date: Tue, 14 Oct 2003 12:24:05 -0700
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>Subject: BOUNCE etf@wa.boyd.com: Non-member submission from [Bruce
>LaVigne <bruce@hp.com>]
>
> >From owner-etf@boyd.com Tue Oct 14 12:24:05 2003
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>Message-ID: <3F8C4FAF.5000401@hp.com>
>Date: Tue, 14 Oct 2003 12:34:07 -0700
>From: Bruce LaVigne <bruce@hp.com>
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>To: mac@verisity.com
>Cc: Shalom.Bresticker@motorola.com, etf@boyd.com
>Subject: Re: statement vs. statement_or_null
>References:
><Pine.GSO.4.10.10310132157500.21882-100000@eagle>
><Pine.GSO.4.10.10310140943500.27024-100000@eagle>
><16268.17728.635861.45245@gargle.gargle.HOWL>
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>
>I can think of two cases where it would be useful:
> a) if there were compile directives (#ifdefs) which caused the entire
> block to become null, and
> b) during debug one might wish to comment out the entirety of a block,
> but leave the surrounding control logic in place.
>
>Just my 2c,
>
>-bruce
>
>
>Michael McNamara wrote:
> > 1) I do not see any value in an empty begin..end block, (whether in a
> > function or not in a function; and
> >
> > 2) I see only a small value to a loop with an empty body
> > while ( do_more_work(a) ) ;
> >
> > 3) #1 is actually allowed by the current BNF, and also by all the
> > tools that I haver access to, which I have cared to try.
> >
> > 4) #2 is not allowed by any of our tools, whether in a function or not
> > in a function; and no user has ever complained. I do not believe
> > that Verilog-XL or VCS accept this either.
> >
> > Throw the following at you favorite Verilog parser:
> >
> > module foo;
> > reg a;
> > initial while (a) ;
> > end
> >
> > So I am against changing Syntax 9-7, so as to allow null statements in
> > loops that occur in functions; as this is definately not an errata.
> >
> > As for Syntax 9-13, the BNF in my printed version of 1364-2001 says:
> >
> > function_seq_block :==
> > begin [: block_identifier {block_item_declaration}]
> > { function_statement } end
> >
> > and the { function_statement } production means "Zero or more
> > instances" of function_statement, so I believe that the current BNF is
> > fine, and needs no change.
> >
> > So I say we withdraw this errata.
> >
> > -mac
> >
> > -- On Oct 14 2003 at 09:44, Shalom.Bresticker@motorola.com sent a message:
> > > To: etf@boyd.com
> > > Subject: "Re: statement vs. statement_or_null"
> > > Friends,
> > >
> > > I need your opinions on this ASAP.
> > >
> > > Thanks,
> > > Shalom
> > >
> > > On Mon, 13 Oct 2003 Shalom.Bresticker@motorola.com wrote:
> > >
> > > > Date: Mon, 13 Oct 2003 22:00:28 +0200 (IST)
> > > > From: Shalom.Bresticker@motorola.com
> > > > To: Steven Sharp <sharp@cadence.com>
> > > > Cc: etf@boyd.com
> > > > Subject: Re: statement vs. statement_or_null
> > > >
> > > > And it seems not to allow a null statement in their function
> equivalents
> > > > as well.
> > > >
> > > > And the obvious reason seems to be that there is no point to a null
> > > > statement in those places.
> > > >
> > > > I guess that means we should reconsider #229 and not include it
> > > > in the 2001c errata sheet.
> > > >
> > > > Shalom
> > > >
> > > >
> > > > On Mon, 13 Oct 2003, Steven Sharp wrote:
> > > >
> > > > > Date: Mon, 13 Oct 2003 13:05:52 -0400 (EDT)
> > > > > From: Steven Sharp <sharp@cadence.com>
> > > > > To: etf@boyd.com, Shalom Bresticker <Shalom.Bresticker@motorola.com>
> > > > > Subject: Re: statement vs. statement_or_null
> > > > >
> > > > > Well, Verilog-XL doesn't allow a null statement in those
> places. I don't
> > > > > know that there is any good reason for that.
> > > > >
> > > > > Steven Sharp
> > > > > sharp@cadence.com
> > > > >
> > > >
> > > >
> > >
> > > --
> > > Shalom
> Bresticker Shalom.Bresticker@motorola.com
> > > Design & Reuse Methodology Tel: +972 9
> 9522268
> > > Motorola Semiconductor Israel, Ltd. Fax: +972 9
> 9522890
> > > POB 2208, Herzlia 46120, ISRAEL Cell: +972 50
> 441478
> > >
> >
> >
--------------------
Stefen Boyd Boyd Technology, Inc.
stefen@BoydTechInc.com (360)666-6957
www.BoydTechInc.com
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