From: Shalom Bresticker (Shalom.Bresticker@motorola.com)
Date: Wed Dec 31 2003 - 02:44:15 PST
13.1 says,
"As evidenced by the config-endconfig syntax, the config is a design element,
similar to a module, which exists in the Verilog name space."
It is not clear what is the "Verilog name space".
Verilog has many name spaces.
Presumably, the sentence means that configs exist in the same name space as
modules.
In 3.12, that is called the "definitions name space".
However, configs are not mentioned there, not anywhere else in 3.12.
13.1.1 also groups configs together with modules and primitives.
However, it also has the :config extension, for the case where a config has
the same name as a module or primitive. However, that case would not be
allowed if configs are in the same name space as modules and primitives.
Nu?
-- Shalom Bresticker Shalom.Bresticker@motorola.com Design & Reuse Methodology Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
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