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Starting: Mon Jul 01 2002 - 07:17:46 PDT
Ending: Tue Oct 04 2005 - 16:11:56 PDT
- (no subject)
- 12.2.1: question on defparams in array of instances
- 1364 database update
- 1364 issue 140 and negative exponents
- 1364-2001b to 1364-1995 compare files
- 1364-2001c index
- 1364-2005 Draft2 posted
- 2.7.4 system tasks and functions
- [Fwd: 237 issue]
- [Fwd: [sv-ec] Scheduling Semantics proposal]
- [Fwd: Email (job) change for me]
- [Fwd: errata/123: PROPOSAL - Fwd: identifier and indexing syntax]
- [Fwd: errata/310: PROPOSAL - wrong or poor xrefs]
- [Fwd: errata/497: add glossary section]
- [Fwd: evaluation order question]
- [Fwd: fix fixes for etfpassed issues]
- [Fwd: hierarchical_identifier]
- [Fwd: Initial proposal for "granularity of resolution"]
- [Fwd: Verilog reaches a critical crossroads]
- [sv-bc] Proposal for SV-BC-34A Namespaces (fwd)
- [sv-bc] SV-EC Proposal: Implicit Universal Data Type - Cliff Cummings to champion the proposal
- [sv-ec] Accellera SystemVerilog 3.1A Focus And Plans
- [sv-ec] ERR-4
- [sv-ec] fork..join_none/join_any and automatic variables
- [sv-ec] Handling of escaped identifiers.
- A big Thank You for all of your effort of 1364-2001 Version C
- A proposal for variable width floating point in Verilog 200X
- A volunteer for generates
- agenda for 1/13 meeting?
- Agenda for 2/10 ETF Meeting
- Agenda for Monday's ETF meeting
- Agenda for the 1/27/03 ETF Meeting
- Agenda for today's ETF meeting
- Amended minutes of 2003_8_11 meeting
- Amendment to ETF-9
- another sign-extension issue
- Aug 11, 2003 Minutes for IEEE 1364 ETF
- BOUNCE etf@boyd.com: Non-member submission from [Dave Rich <David.Rich@synopsys.com>]
- BTF meeting?
- Cancelling Monday's meeting
- Change summary document for 1364-2001c
- cleaning up 1364-2001
- Comment on Issue 211
- Committment to assign Copyright of System Verilog to IEEE-1364
- config name space
- Configurations issues and questions
- Contact Information
- continuous assignment LHS
- Corrected minutes of 07/28/2003 meeting of the IEEE 1364 group
- dan jacobi's comments
- Database access now working from web...
- db updates
- December 1, 2003 Minutes for IEEE 1364 ETF
- Defparam & module instance parameter assignment
- Directions on generate
- do configuration statements end with semicolon?
- Draft 1364-2001 C
- Draft Minutes of June 23rd IEEE 1364 Working Group Meeting
- duplicate issues
- edits to etfpassed issues
- Email issues passed from email vote
- email votes
- enhancement/220: $random functions not 64-bit portable
- enhancement/240: Allow initializing declarations in named blocks, tasks, functions
- enhancement/252: Need to reserve range of values for future additions to VPI
- enhancement/280: turn xrefs blue and/or underlined
- enhancement/287: `compatibility - backward compatibility compiler directives
- enhancement/287: `compatibility - backward compatibilitycompiler directives
- enhancement/287: `compatibility - backward compatibilitycompilerdirectives
- enhancement/293: : variable width floating point in Verilog 200X
- enhancement/297: Allow instance array connected to data array
- enhancement/298: Add field widths to print formats
- enhancement/342: Deprecate the PLI 1.0 sections
- enhancement/350: Proposal to deprecate configs in Verilog source files
- enhancement/354: There is no $feof function
- enhancement/357: Proposal for Extending Verilog Data Types
- enhancement/358: Proposal for IP Encryption Format for Verilog
- enhancement/359: constraint library
- enhancement/359: Proposal for Randomization and Constraints
- enhancement/378: add Quick Reference
- enhancement/381: ANALYZED - table model system task
- enhancement/383: add inherited connections
- enhancement/384: add mfactor parameters
- enhancement/385: interconnect net that resolves to type
- enhancement/386: ANALYZED - user defined functions on instantiations
- enhancement/387: calling system tasks at elaboration
- enhancement/388: genvar in behavior
- enhancement/389: dynamic param
- enhancement/38: PROPOSAL - Add examples of trireg charge strength declarations to 3.4.1
- enhancement/390: math functions
- enhancement/391: wreal type
- enhancement/392: ANALYZED - break/continue statements to break out of loops
- enhancement/392: break/continue statements to break out of loops
- enhancement/392: PROPOSAL - break/continue statements to break out of loops
- enhancement/400: reduce arithmetic operators x-pessimism
- enhancement/401: reduce relational operators x-pessimism
- enhancement/404: add wildcards for equality operators
- enhancement/405: add ranges for equality operators
- enhancement/406: add lists for equality operators
- enhancement/409: lists in part-selects
- enhancement/411: extend operators to vectors and arrays
- enhancement/414: rotate operator
- enhancement/419: reconsider for 1364-2005 proposals made for 1364-2001
- enhancement/421: move 17.9.3 to Annex
- enhancement/422: extend $dumpvars to exclude a signal or module
- enhancement/427: combine 4.1.3 and 4.1.6
- enhancement/429: Fwd: Enhancement
- enhancement/430: Add `pragma compiler directive
- enhancement/430: PROPOSAL - Add `pragma compiler directive
- enhancement/431: Add language defined attribute capability
- enhancement/431: PROPOSAL - Add language defined attribute capability
- enhancement/432: Add shared declaration mechanism to Verilog - packages
- enhancement/432: PROPOSAL - Add shared declaration mechanism to Verilog - packages
- enhancement/435: Verilog transaction recording extensions
- enhancement/436: Non-blocking event trigger
- enhancement/436: PROPOSAL - Non-blocking event trigger
- enhancement/437
- enhancement/437: A proposal for adding verification test bench specific enhancements
- enhancement/437: please close this issue, it duplicates 455
- enhancement/442: Add auto-increment and auto-decrement statements
- enhancement/442: PROPOSAL - Add auto-increment and auto-decrement statements
- enhancement/443: Allow modules to be passed through ports
- enhancement/447: `ifdef boolean combination of identifiers
- enhancement/448: extend new file i/o to allow combinations of fd's
- enhancement/450: : Compressed Assignment Satements
- enhancement/451: review Annex C and D
- enhancement/453: add `undefineall functionality
- enhancement/455: Fwd: pdf file attachment for BTF en#455
- enhancement/455: Jeda Verification Enhancements
- enhancement/457: extend index to complete 1364-2001
- enhancement/458: extend index to cover 1364-2005 enhancements
- enhancement/461: Proposal: Eliminate IEEE Enhancements Submis sion Deadline
- enhancement/461: Proposal: Eliminate IEEE Enhancements Submission Deadline
- enhancement/466: Separate Compilation
- enhancement/473: Preprocessor directive for user defined preprocessor
- enhancement/475: Support a container to define how to interface to a set of signals.
- enhancement/476: Standard reporting mechanism for functional errors/warnings, etc.
- enhancement/477: Provide an assertion statement with the capability to use industry standard property specification.
- enhancement/477: Provide an assertion statement with thecapabilityto use industry standard property specification.
- enhancement/478: Provide part selection of a structure
- enhancement/481: define standard preprocessor
- enhancement/482: add standard way to define functional coverage points
- enhancement/492: add lists of figures, tables, syntaxes
- enhancement/496: Want safe VPI methods to call.
- enhancement/502: Dynamic Values on attributes
- enhancement/502: enhancement/502: Dynamic Values on attributes
- enhancement/508: add arrays of `defines
- enhancement/509: add arrays of parameters
- enhancement/514: config file should support module and primitive arrays
- enhancement/519: system function to get signal strength
- enhancement/520: 3.3.2: deprecate "scalared" and "vectored" keywords
- errata
- errata (fwd) - URGENT!
- errata for 1364-2001c
- errata/100: PROPOSAL - 10.2: output arguments of automatic tasks not initialized
- errata/102: PROPOSAL - TOC goes only 1 level down
- errata/103: PROPOSAL - Index missing
- errata/113: generate
- errata/114: PROPOSAL - A.1.5, A.2.1.1, A.2.8: port style parameter declarations
- errata/116: PROPOSAL - 19, para. 1: Grave accent
- errata/116: PROPOSAL - 19, para. 1: Grave accent (fwd)
- errata/117: comments
- errata/117: Partial Proposal
- errata/117: PROPOSAL - 19.1,19.6,19.9: `unconnected_drive and `celldefine
- errata/119: ANALYZED - 2.6.3 (Table 1): Octal escape sequences
- errata/119: PROPOSAL - 2.6.3, Table 1: Octal escape sequences
- errata/121: PROPOSAL - Syntax 12-7
- errata/123: Fwd: identifier and indexing syntax
- errata/123: PROPOSAL - Fwd: identifier and indexing syntax
- errata/123: PROPOSAL - identifier and indexing syntax
- errata/124: PROPOSAL - 17.2.4.3: Second sentence for %m should be in own paragraph
- errata/128 should be promoted to 'etfpassed', thanks.
- errata/128: clogb2 still wrong
- errata/128: PROPOSAL - 10.3.5 Example: ram_model
- errata/129: PROPOSAL - unordered list dashes did not print in 2001a
- errata/133: PROPOSAL - Table 12: Precedence rules for operators
- errata/139: PROPOSAL - 19.3.1 miscellaneous small errata
- errata/13: PROPOSAL - 12.2.2:example of named param passing before its descriptioB
- errata/13: PROPOSAL - 12.2.2:example of named param passing before its description
- errata/140 "**" as an integer trucated operator
- errata/140 "**" as an integer trucated operator try2
- errata/140 and errata/192: real values vs integer values
- errata/140: negative exponents
- errata/140: PROPOSAL - Section 4.1.5: Definition of power operator
- errata/140: PROPOSAL - Section 4.1.5: Definition of power operator result type
- errata/140: PROPOSAL - Section 4.1.5: Definition of power operator result type (fwd)
- errata/140: Section 4.1.5: Definition of power operator result type
- errata/142: PROPOSAL - 2.5.1: bad cross-reference to Table 8-1
- errata/146: PROPOSAL - 3.9: poor cross-reference to $time section
- errata/150: PROPOSAL - 3.11.2 Local parameters - wording issues
- errata/153: PROPOSAL - Section 12.3.3, A.2.1.2, ouput_declaration is ambiguous
- errata/159: footnote numbering in syntax boxes
- errata/160: PROPOSAL - PDF bookmarks
- errata/161: PROPOSAL - hyperlink cross-references
- errata/163: ANALYZED - document formatting problems
- errata/163: PROPOSAL - document formatting problems
- errata/165: PROPOSAL - 13.11.1, A.2.1.1 -- reuse task_port_type
- errata/166: PROPOSAL - 2001b, 1.4: "Clause 2" missing clause title
- errata/168: PROPOSAL - 12.3.2: Bad grammar
- errata/169: one more printing problem
- errata/169: PROPOSAL - one more printing problem
- errata/16: 19.7 `line - meaning of level parameter is unclear
- errata/170: ANALYZED - formatting of bnf non-terminals
- errata/172: Implicit declarations
- errata/173: PROPOSAL - misc typos
- errata/175: 13.2: file_path_spec syntax and related issues
- errata/175: Paths in library mapping rules (fwd)
- errata/175: PROPOSAL - 13.2: file_path_spec syntax and related issues
- errata/175: PROPOSAL - 13.2: file_path_spec syntax andrelated issues
- errata/176: PROPOSAL - 12.1.3.2, Example 5: wrong generate name
- errata/181: PROPOSAL - 4.3, 9.2.1-3, A.8.4-5: 12 productions better expressed with 3
- errata/182
- errata/182 - Syntax 9-8: event_control
- errata/184: PROPOSAL - 23.4: "the an" should be "the"
- errata/189: PROPOSAL - 12.1, macromodule needs clarification
- errata/190: PROPOSAL - 9.5.1: Extra zero in Example 1
- errata/192: PROPOSAL - 3.3.1: are real values for ranges allowed?
- errata/195: PROPOSAL - 3.11.3: last example has syntax errors
- errata/198: 12.3.9.2: sinks should allow only constant part-selects
- errata/200: [sv-bc] SV-BC-19-24
- errata/200: A.3.1, A.4.1, A.5.4, A.9.3 et al: extra [range]
- errata/200: PROPOSAL - A.3.1, A.4.1, A.5.4, A.9.3 et al: extra [range]
- errata/204
- errata/204: 12.3.2, port definition names
- errata/205: PROPOSAL - 2.8, 3.12: Attribute names can/cannot be redefined
- errata/205: PROPOSAL: 2.8, 3.12: Attribute names can/cannot be redefined
- errata/206: ANALYZED - 9.2, 9.7: editorial bugs
- errata/206: PROPOSAL - 9.2, 9.3, 9.7: editorial bugs
- errata/208: PROPOSAL - 12.4, A.9.4: no negative indexes in hierarchical_identifiers
- errata/209: hierarchical_identifier
- errata/209: PROPOSAL - 12.4, A.9.3: simple, escaped hierarchical_identifiers difference
- errata/20: PROPOSAL - A.2.8 should prevent all variable declarationassignments in named blocks
- errata/210: A.4.1,A.5.4: Why no anonymous module instances?
- errata/210: PROPOSAL - A.4.1, A.5.4: Why no anonymous module instances?
- errata/211: 3.11.2: localparam behavior not clear
- errata/211: errata/211: PROPOSAL - 3.11.2: localparam behavior not clear
- errata/211: PROPOSAL - 3.11.2: localparam behavior not clear
- errata/211: question on Verilog-2001 : localparam
- errata/217: PROPOSAL - Note that task/func params can only be overridden by defparams
- errata/224: PROPOSAL - 10.2, A.2.7: tf port declarations
- errata/225: PROPOSAL - 12.3.3: The fourth port direction
- errata/225: PROPOSAL - The fourth port direction
- errata/226: ANALYZED - Illegal to assign mintypmax expression to parameter?
- errata/226: PROPOSAL - Illegal to assign mintypmax expression to parameter?
- errata/227: task/function port lists and internal block item declarations
- errata/228: PROPOSAL - 4.2.1, indexed part-select with width-expression of -5
- errata/229: PROPOSAL - some function_statement should be function_statement_or_null
- errata/22: @* should have a space ?
- errata/230: PROPOSAL - function_loop_statement should not allow "forever"?
- errata/231: PROPOSAL - A.6.2: function_statement_or_null should be in A.6.4
- errata/232: PROPOSAL - Syntax 2-2, A.6.9: system_task_enable with null arguments
- errata/233: 12.3.4: nonport declarations for identifiers mentioned in list_of_port_declarations
- errata/234: 12.3.{2,3,6}, named port connections for implicit ports with same name
- errata/236: PROPOSAL - Table 30: Last line should be Concatenation of any of the above
- errata/236: Table 30: Last line should be Concatenation of any of the above
- errata/237: A.7.5.3: scalar_timing_check_expressions has redundancies
- errata/237: PROPOSAL - A.7.5.3: scalar_timing_check_expressions has redundancies
- errata/237: PROPOSAL - A.7.5.3: scalar_timing_check_expressionshas redundancies]
- errata/238: PROPOSAL - A.1.4, A.7.3: Should range_expression be constant_range_expression?
- errata/239: 1.4: "veriuser.h" and "vpi_user.h" reversed
- errata/239: PROPOSAL - 1.4: "veriuser.h" and "vpi_user.h" reversed
- errata/241: 23,25,27: every pli routine definition starts a new page
- errata/242: 23.9, 27.15: Is -f standard ?
- errata/243: 10.3.1: Call functions "reentrant", not "recursive"
- errata/243: PROPOSAL - 10.3.1: Call functions "reentrant", not "recursive"
- errata/244: A.4.1: change name_of_instance to name_of_module_instance
- errata/244: PROPOSAL - A.4.1: change name_of_instance to name_of_module_instance
- errata/245: 12.2: confusing
- errata/246: 12.4 et al: hierarchical references from instance array
- errata/247: 12.4 et al: hierarchical references from instance array
- errata/248: 3.12: configurations, modules, and name spaces
- errata/249: 3.11.3: needless reference to 1364-1995
- errata/249: PROPOSAL - 3.11.3: needless reference to 1364-1995
- errata/250: A.8.3: Is expression redundant in range_expression?
- errata/253: 26.6.7 typo in note number 12
- errata/254: Table 30 should clarify that LHS can be array word/bit-select/part-select
- errata/255: clarify explicitly whether a module may instantiate itself
- errata/256: red hyperlinked BNF?
- errata/257: PROPOSAL - Should white space be allowed in hierarchical references?
- errata/257: Should white space be allowed in hierarchical references?
- errata/258: 12.3.4: "simple identifier" is misleading
- errata/258: PROPOSAL - 12.3.4: "simple identifier" is misleading
- errata/259: 19.3.1: Allow escaped identifiers as text macro names
- errata/259: PROPOSAL - 19.3.1: Allow escaped identifiers as text macro names
- errata/260: 17.1.1: typo, missing comma
- errata/260: PROPOSAL - 17.1.1: typo, missing comma
- errata/261: Clarify whether a is the same as a[0:0] when a is a scalar?
- errata/261: PROPOSAL - Clarify whether a is the same as a[0:0] when a is a scalar?
- errata/262: Formatting problem in example in Clause 13.1
- errata/262: PROPOSAL - Formatting problem in example in Clause 13.1
- errata/263: 17.9: incorrect bolding in BNFs
- errata/263: PROPOSAL - 17.9: incorrect bolding in BNFs
- errata/264: misc. editorial boo-boos
- errata/264: PROPOSAL - misc. editorial boo-boos
- errata/265: 9.2.2: misc editorial fixes
- errata/265: PROPOSAL - 9.2.2: misc editorial fixes
- errata/266: 4.1.14: replication operator
- errata/267: 2.5.1: Integer constants
- errata/267: PROPOSAL - 2.5.1: Integer constants
- errata/268: Syntax 17-17,18: misbolding
- errata/269: more keyword bolding
- errata/269: PROPOSAL - more keyword bolding
- errata/270: keyword "or" should be bold
- errata/270: PROPOSAL - 9.7, 12.2: keyword "or" should be bold
- errata/271: Fwd: Errata for 1364-2001
- errata/272: ANALYZED - Nonconstant parameter assignments in module instantiations (A.4.1)
- errata/272: Nonconstant parameter assignments in module instantiations (A.4.1)
- errata/272: PROPOSAL - Nonconstant parameter assignments in module instantiations (A.4.1)
- errata/273: LRM does not specify result of real division by 0
- errata/274: LRM does not specify how Infinity and NaNs to be displayed for real numbers
- errata/275: 15.2.3, 15.2.6: "timecheck" should be timestamp"
- errata/275: PROPOSAL - 15.2.3, 15.2.6: "timecheck" should be timestamp"
- errata/276: BNF A.6.4 doesn't allow fork/join in functions
- errata/276: PROPOSAL - BNF A.6.4 doesn't allow fork/join in functions
- errata/277: 3.9: bad references
- errata/277: PROPOSAL - 3.9: bad references
- errata/278: 17.1.1: not clear how "\a" is interpreted
- errata/279: /268
- errata/281: fork..join in automatic tasks/functions
- errata/281: PROPOSAL - fork..join in automatic tasks/functions
- errata/282
- errata/282: 4.5: sign extension and bit-length rules not clear enough
- errata/283: PROPOSAL - Syntax 2-1: 'dx, 'dz
- errata/283: Syntax 2-1: 'dx, 'dz
- errata/285: VCD $dumpoff and real values
- errata/288: 4.1.14, replication operator and function calls
- errata/289: Bit selects of integers
- errata/290: Escaping keyword identifiers
- errata/291: misleading text on `line in 19.7
- errata/292: 12.3.3 : net declaration before port declaration
- errata/294: vpiDefAttribute on non-modules 26.6.42
- errata/295: A.1.5 Attribute on generated_instantiation
- errata/295: PROPOSAL - A.1.5: Attribute on generated_instantiation
- errata/296: Generate stmts will need change made in VPI
- errata/299: /117 comments
- errata/300: duplicates errata/200
- errata/301: local params paragraph issues
- errata/302: Why only ranges on specparams (A2.1.1)
- errata/308: 9.7.2 ambiguous about @r when r is a vector
- errata/309: 19.4, Example 3: two run-on $display lines
- errata/309: PROPOSAL - 19.4, Example 3: two run-on $display lines
- errata/310: PROPOSAL - wrong or poor xrefs
- errata/310: wrong or poor xrefs
- errata/310: wrong or poor xrefs, etc.
- errata/311: Problem with loads in VPI
- errata/317: 3.10: max array size not clear enough
- errata/317: PROPOSAL - 3.10: max array size not clear enough
- errata/318: Table 30, 9.3.2, procedural assign to nonconstant part select and force of nonconstant bit-select
- errata/318: Table 30, 9.3.2,procedural assign to nonconstant part select and force of nonconstantbit-select
- errata/319: constant array element select as LHS of continuous assignment
- errata/321: Table 29, 4.1.14, 2.5.1(3) , 3.9 -- size of unsized numbers and integer variables
- errata/322: 14.5, para. 2: "Figure 40" should be "Figure 39"
- errata/322: PROPOSAL - 14.5, para. 2: "Figure 40" should be "Figure 39"
- errata/323: Some NOTES should be normative
- errata/324: 15.1, A.7.5.2 -- Should timing_check_limit be constant_expression?
- errata/325: 12.4 confused on hierarchy for automatics
- errata/325: PROPOSAL - 12.4 confused on hierarchy for automatics
- errata/326: Handling of escaped identifiers.
- errata/329: 27.29: vpi_put_data not used in example
- errata/330: 27.29: vpi_put_data not used in example
- errata/331: 19.3.1: when is a `define argument not an argument?
- errata/332: 12.3.3 -- port direction declarations that don't mention the size of port
- errata/334: 12.6, Example 2: incorrect comment "redundant assignments to reg r"?
- errata/335: 23.24: "acc_fetch_paramtype" should be "acc_fetch_paramval" x 2
- errata/336: Attributes in VPI but not in BNF (26.6.42 vs Appendix A)
- errata/337: BNF allows attribute on specify_block (A.1.5)
- errata/337: PROPOSAL - A.1.5: BNF allows attribute on specify_block
- errata/338: PROPOSAL - 14, A.7.4: syntax of edge sensitive module path descriptions
- errata/338: syntax of edge sensitive module path descriptions
- errata/339: pulse control declarations not represented in VPI
- errata/340: /210
- errata/344: Case Statements with Real Expressions
- errata/345: 10.2.1, 10.3.1, 12.3.3, 12.3.4 -- ANSI-style port lists and redeclaration
- errata/346: A.2.6 no attributes on old-style function arguments
- errata/346: PROPOSAL - A.2.6 no attributes on old-style function arguments
- errata/349: PROPOSAL - Your details
- errata/351: 9.2.2, Example 6: unclear comment
- errata/352: 10.2.2 implies task arguments can be left off
- errata/352: PROPOSAL - 10.2.2 implies task arguments can be left off
- errata/353: 1.2: clarify terms like "undefined"
- errata/355: 3.7 and 7.10,7.13: need xrefs
- errata/356: 16: "1497-1999" should be "1497-2001"
- errata/356: PROPOSAL - 16: "1497-1999" should be "1497-2001"
- errata/360: D.3-D.6: delay modes not defined
- errata/361: PROPOSAL - Syntax 14-1 omits specify_block
- errata/361: Syntax 14-1 omits specify_block
- errata/362: 15.5: notifier is reg only?
- errata/363: 15.5.1-15.5.4: neg timing checks only?
- errata/364: Preprocessor macros within strings.
- errata/365: 26.6.6 vpiLeftRange/vpiRightRange from net bit makes no sense
- errata/367: 27.32 Cancelling event does not say what happens to handle
- errata/368: 26.3.3 Should vpiLineNo and vpiFile apply to generate objs?
- errata/372: Errata on Verilog configurations- Section 13
- errata/375: Consistency on attributes on specparams
- errata/379: 4.2.1: "run-time parameter assignments" ???
- errata/379: PROPOSAL - 4.2.1: "run-time parameter assignments" ???
- errata/37: Possible syntax restrictions on periods
- errata/380: PROPOSAL - 12.1.3: should allow tasks/functions in generate loops
- errata/380: should allow tasks/functions in generate loops
- errata/381: table model system task
- errata/382: add view configurations
- errata/394: Meaning of special characters in $value$plusargs
- errata/395: 3.9.1: content overlaps end of 3.9 + other problems
- errata/3: Inconsistent restrictions on system tasks in constant functions (fwd)
- errata/3: PROPOSAL - Inconsistent restrictions on system tasks in constant functions
- errata/402: 9.5, evaluation of case expression
- errata/402: PROPOSAL - 9.5: evaluation of case expression
- errata/403: 4.1.13: "known" and "ambiguous" are ambiguous
- errata/412: 2.5.1: rearrange text on x/z
- errata/412: PROPOSAL - 2.5.1: rearrange text on x/z
- errata/413: 4. scalar expressions
- errata/413: PROPOSAL - 4. scalar expressions
- errata/415: error BNF: redundant function calls in "module_path_primary" and "primary"
- errata/415: PROPOSAL - BNF: redundant function calls in "module_path_primary" and "primary"
- errata/416: check use of constant_expression
- errata/417: improving syntax boxes
- errata/418: review 1364-2001 ballot comments and responses
- errata/423: 17.2.4.3 $sscanf and x/z
- errata/424: Clarify terms "design unit", "description" and "hardware description"
- errata/425: "macromodule" use
- errata/428: 2.5.1, value of 16'shc, request for clarification
- errata/428: PROPOSAL - 2.5.1, value of 16'shc, request for clarification
- errata/428: PROPOSAL - 2.5.1, value of 16'shc, request for clarification]
- errata/439: PROPOSAL - Syntax 6-2 should be titled "Syntax for variable declaration
- errata/439: Syntax 6-2 should be titled "Syntax for variable declaration assignment"
- errata/440:
- errata/441: 3.2.2, 4.1.6: Nets also have signedness
- errata/441: PROPOSAL - 3.2.2, 4.1.6: Nets also have signedness
- errata/444: returning EOF
- errata/445: Syntax 17-1 misbolding
- errata/446: 17.2.4 gives incorrect modes for reading
- errata/449: 4.1.4 -- expression evaluation short circuiting
- errata/452: 10.2.2, 10.3.1 -- 'reg' keyword in tf port declarations
- errata/454: 2.3.1: 2'sb0000000_10 == 2'sb10 ?
- errata/456: check index
- errata/459: 9.2: assignment variable_lvalue evaluation order question
- errata/460: 9.6, 9.7.7: neg/x/z repeat count
- errata/462: A.1.1: "<file_path_spec" should be "file_path_spec"
- errata/462: A.1.1: "<file_path_spec>" should be "file_path_spec"
- errata/462: PROPOSAL - A.1.1: "<file_path_spec" should be "file_path_spec"
- errata/462: PROPOSAL - A.1.1: "<file_path_spec>" should be "file_path_spec"
- errata/463: 4.1.13: Zero fill in ?: even if signed or x/z
- errata/463: another sign-extension issue
- errata/463: errata/463: another similar error
- errata/464: 14.2.4.2: syntax error in Example 1
- errata/464: PROPOSAL - 14.2.4.2: syntax error in Example 1
- errata/465: 3.2, 3.6: net and variable initialization descriptions
- errata/467: assignments on port declarations 12.3
- errata/467: PROPOSAL - 12.3: assignments on port declarations
- errata/468: 4.2.1: Vector bit-select and part-select addressing
- errata/469: 19.6: can `resetall occur within a module definition?
- errata/470: 19.2: Compiler directives and source file boundaries
- errata/470: PROPOSAL - 19.2: Compiler directives and source file boundaries
- errata/471: / Synchronous UDP Scheduling Semantics
- errata/472: 2.5.1: underscore characters legal anywhere in a number?
- errata/474: First class part selection operator
- errata/479: 4.2.1 Vector bit-select and part-select addressing
- errata/47: PROPOSAL - Wrong description of tri0/1 in 3.7.4
- errata/47: PROPOSAL - Wrong description of tri0/1 in 3.7.4 (fwd)
- errata/483: 4.2: Bit/part-selects of parameters
- errata/484: 10.3.4.e: assignment of function result value
- errata/484: PROPOSAL - 10.3.4.e: assignment of function result value
- errata/485: Multi-line string literals?
- errata/486: 12.3.3: Implicit nets are not necessarily unsigned
- errata/487: Unclear parameter type conversion rules (3.11.1 and 12.2)
- errata/488: 6.1.1, 12.3.3: output wire [3:0] o = 4'b1010 ;
- errata/488: PROPOSAL - 6.1.1, 12.3.3: output wire [3:0] o = 4'b1010 ;
- errata/489: parameters with signed but no range (3.11.1 and 12.2)
- errata/493: Can defparam assignment use parenless mintypmax expression?
- errata/493: PROPOSAL - Can defparam assignment use parenless mintypmax expression?
- errata/494: another erratum
- errata/497: add glossary section
- errata/498: enhanement system function/task to extract timescale info to variables
- errata/499: 3.2.2, 4.1.6: parameter signedness
- errata/500: hierarchical block references
- errata/501: library file_path syntax
- errata/503: Term "variable" misused in section 18
- errata/504: A.2.2.1: simplify BNF of real_type, variable_type
- errata/504: PROPOSAL - A.2.2.1: simplify BNF of real_type, variable_type
- errata/505: 10.2.1 -- declaration of portless tasks
- errata/505: PROPOSAL - 10.2.1 -- declaration of portless tasks
- errata/506: 4.5.1 Missing cases in signedness rules
- errata/510: : Is "module m(.p(p));" legal?
- errata/511: 9.8.4 typo: "procedural blocks" should be "parallel blocks"
- errata/511: PROPOSAL - 9.8.4 typo: "procedural blocks" should be "parallel blocks"
- errata/515: 1.3b: keyword size is not larger
- errata/515: PROPOSAL - 1.3b: keyword size is not larger
- errata/521: section 7: connection of vector to gate terminal
- errata/67: "event_trigger" production in BNF does not allow array indexing
- errata/67: PROPOSAL - A.6.5: "event_trigger" production in BNF does not allow array indexing
- errata/6: PROPOSAL - 12.1.3 : Unclear parameter restriction in generated instantation
- errata/70: PROPOSAL - Logical operator (&& ||) sizing rules in Table 29 incorrect
- errata/73: PROPOSAL - 4.1.14 implies replication legal lvalue
- errata/75: PROPOSAL - Table 30 omits nested concatenations
- errata/76: PROPOSAL - 4.1.14: unclear examples of illegal concatenations
- errata/77: PROPOSAL - Table 30: Last LHS line is not clear
- errata/78: PROPOSAL - Errata: Inconsistent spelling of "bit-select" and "part-select"
- errata/82: Section 9.7.5: Description of @*, @(*) incomplete
- errata/85: PROPOSAL - A.6.5: repeat event_control grammar ambiguity
- errata/87: PROPOSAL - 17.2.8: $readmem default start_addr should be lowest address
- errata/88: 9.7.2 should say that event_controls can be expressions
- errata/9 proposal
- errata/91: PROPOSAL - Note 7 in section 26.6.5 is misleading
- errata/91: PROPOSAL - Note 7 in section 26.6.5 ismisleading
- errata/92: PROPOSAL - 17.10.2 should talk about leading plus sign
- errata/93: PROPOSAL - 17.10.2 errors in the example
- errata/93: PROPOSAL - Section 17.10.2 errors in the example
- errata/9: errata/9:PROPOSAL
- errata/9: Modified proposal wording - truncation
- errata/9: PROPOSAL - Please define truncation rules
- errata/9: PROPOSAL - Please define truncation rules (fwd)
- errata/9: Truncation rules
- etf db update
- etf issue promotion
- etf issue state updates
- ETF issue to vote on closing 3/14/03
- ETF issues passed on 3/14/03
- ETF Meeting 4/7/03
- ETF Meeting 8/11/03
- ETF Meeting Monday
- ETF Meeting Monday 7/14
- ETF Meeting Monday 7/28, 8:30am PST
- ETF Meeting Monday December 1
- ETF Meeting Monday Morning
- ETF meeting today
- etf proposals
- etf proposals for email voting
- etf proposals for email voting closing Monday 6/16 at 8:30am
- etf-passed issues
- ETF-passed issues for tomorrow's VSG meeting
- etf/ptf issue correspondence
- extended vcd
- future db for 1364-2005 draft errata
- Fwd: BOUNCE etf@boyd.com: Non-member submission from ["Pat Garvin" <pgarvin@attbi.com>]
- Fwd: ETF fell swoop #1
- Fwd: minutes of the 10/6/03 meeting
- generate
- Generate discussions
- Generate Doc.
- hierarchical_identifier
- I believe that it is time to create a draft one 1364-2005
- I propose to vote by email on 265, 270, 322
- I'll be mostly on vacation for the next few days
- IEEE 1364 Verilog WG is collecting user input for next generation of the verilog language
- IEEE 1364-2001 C Draft for your approval
- IEEE 1364-2001c
- IEEE-Published status?
- implicit instantiation of top-level modules?
- Improtant! IEEE 1364-2001 reprint
- Index & Slice expressions for signed n dimension arrays ( n > 1)
- issue 123
- issue promotion to vsgpassed
- joining the group
- July 14, 2003 Minutes for IEEE 1364 ETF
- library and configuration issues
- Meeting 9/8/03
- Meeting on Monday
- Minutes are posted...
- Minutes for 2/10/03 ETF Meeting
- Minutes for today's meeting
- Minutes from the 3/24/03 ETF Meeting
- Minutes from the Errata Task Force Conference Call March 24, 2003
- Minutes from the Errata Task Force Conference Call May 19, 2003
- Minutes from the last meeting
- Minutes from today's ETF Meeting
- Minutes of 01/13/2003 IEEE 1364 Working Group meeting
- Minutes of 12/02/2002 IEEE 1364 working group meeting
- Minutes of 3-10-2002 Verilog Standards Group Meeting
- Minutes of 7 May 2003 IEEE 1364 Working Group Meeting
- Minutes of Pre Dac discussion
- Minutes of the 1/13/03 ETF meeting
- Minutes of the 1/27/03 ETF Meeting
- Minutes of the 15 Dec 2003 IEEE 1364 Working Group Meeting
- Minutes of the August 25th meeting of the IEEE Verilog WG
- Minutes of the July 28th IEEE 1364 Working Group Meeting
- Minutes of the November 17th, 2003 IEEE 1364 Working Group
- Minutes of the October 20, 2003 meeting of the IEEE 1364 Working Group
- Minutes of the September 22nd 2003 meeting of the IEEE 1364 W G
- Minutes of the September 22nd 2003 meeting of the IEEE 1364 WG
- Minutes of the September 8, 2003 ETF meeting
- Minutes posted for Dec 1 meeting
- Monday conference call
- Monday's meeting
- my army reserve duty
- my assigned issues
- My TBD errata
- negative interconnect delay
- new 1364 PAR at http://standards.ieee.org/board/nes/projects/1364.pdf
- new online version of 1364-2001
- new state for database
- new vsgpassed issues
- Next IEEE 1364 Working Group Meeting is 2/10/2003
- next meeting
- No meeting Monday
- November 3, 2003 Minutes for IEEE 1364 ETF
- open etf issues
- open issues
- open issues reports
- Out of Office AutoReply: errata/140: PROPOSAL - Section 4.1.5: Definition of power operator result type
- Out of Office AutoReply: errata/184: PROPOSAL - 23.4: "the an" should be "the"
- Out of Office AutoReply: errata/306: PROPOSAL - 26.6.40: Time que ue - note 3 improperly worded
- Out of Office AutoReply: errata/462: PROPOSAL - A.1.1: "<file_pat h_spec>" should be "file_path_spec"
- Overloading in Verilog?
- Parameter select
- parametric code question
- partial solutions
- Paths in library mapping rules
- Please post the minutes
- Proposal: Implicit Universal Data Type - Cliff Cummings to champion the proposal
- proposals
- Proposed Errata document for debate and acceptance
- PTF meeting minutes for 9/8/2003
- PTF: Minutes from the 1/17/2003 PTF meeting (fwd)
- read unix environment variable into Verilog?
- Reminder for an ETF meeting Monday 9/8/03
- Resend of minutes
- Results of ETF Voting that closed 2/24/03
- Results of voting that closed 3/5/03
- Returned due to virus; was: Thank you!
- Returned due to virus; was: Your details
- Robert's Rules of Order on Voting
- Ship a revised Verilog-2001
- signing question
- Simpler ETF issue to vote on closing 3/5/03
- Simpler issues passed 2/3/03
- Simpler issues that passed at 5pm on 2/10/03
- Simpler issues to vote via email closing 1/22/03
- Simpler issues to vote via email closing 2/10/03
- Simpler issues to vote via email closing 2/17/03
- Simpler issues to vote via email closing 2/24/03
- sorry [Fwd: errata/237: PROPOSAL - A.7.5.3: scalar_timing_check_expressions has redundancies]
- Start the Presses on 1364 Version C!!! (fwd)
- statement vs. statement_or_null
- Statements to the Press
- SV-EC Proposal: Implicit Universal Data Type - Cliff Cummings to champion the proposal
- SV-EC Proposal: Procedural Assignments to Declared or Implicit Wires - Cliff Cummings to champion the proposal
- SV-EC Proposal: Procedural Assignments to Declared or Implicit Wires - Correction
- SystemVerilog non-donation to IEEE
- That movie
- The meeting today is on
- The virus e-mail was not sent by computer
- There IS an ETF conference call today, isn't there?
- There were a few more...
- Today's meeting
- transitioning to new server
- udp scheduling semantics
- up to date draft of lrm
- updates to Release fields of etf-passed issues
- user input meetings
- Var decl assignment
- Verilog BTF (fwd)
- Verilog Standards Group meeting Tuesday June 24th
- Voting by email on ETF issue 310
- Voting results for 2/17/03 email vote for ETF
- VPI diagram for generates
- VSG meeting on Monday 3/10/03
- You are advised of new Draft DASC rules
- Your application
- Your DASC and SA membership
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