From: Shalom.Bresticker@motorola.com
Date: Tue Feb 10 2004 - 00:00:00 PST
>Number: 539
>Category: errata
>Originator: Shalom.Bresticker@motorola.com
>Description:
16.2.2, in Table 63 contains the seemingly strange comment that $nochange is
"not usually implemented in Verilog simulators".
The comment is true in that Verilog-XL, NC-Verilog, and VCS all do not currently
implement $nochange. They accept the syntax, but do nothing with it.
Anyway, it seems like a strange comment because the LRM does not seem to treat
it as an optional part of the language, but just like any other timing check
which a tool is required to accept in order to be fully compliant with the
language.
Is an official IEEE standard the proper place for a comment about what is
"usually implemented"?
If $nochange is optional, then 1364 should simply say so.
And any comment about the limited use or applicability of $nochange should
be placed also in 15.3.6, and especially there, which is the main section
describing $nochange.
This was Tel Elkind's comment:
$nochange was originally implemented for a now defunct timing
analysis tool called Veritime. At the time, 1990, it wasn't felt
$nochange was implementable in Verilog-XL, but it *was* implemented in
Veritime, and so naturally Cadence included it in the Verilog language
proposal to OVI that eventually went on to become the 1364 IEEE
standard. When the 1364 timing committee developed the current chapters
on timing checks it was felt that simulator technology was capable of
implementing $nochange, and I'm surprised the wording wasn't changed in
the latest standard. This would be an oversight as I think the
intention was to encourage Verilog simulator vendors to implement
$nochange.
-- Shalom Bresticker Shalom.Bresticker@motorola.com Design & Reuse Methodology Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
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