Re: errata/282: signing

From: Stefen Boyd (stefen@boyd.com)
Date: Mon May 03 2004 - 21:50:03 PDT

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    The following reply was made to PR errata/282; it has been noted by GNATS.

    From: Stefen Boyd <stefen@boyd.com>
    To: Alec Stanculescu <alec@fintronic.com>
    Cc: etf-bugs@boyd.com
    Subject: Re: errata/282: signing
    Date: Mon, 03 May 2004 22:04:27 -0700

     Alec,
     
     This has been rather heated discussion and I don't intend to stoke
     the fire...
     As a user, I was there during the discussions when we added signed
     arithmetic. Perhaps I don't represent all of the users, but for a
     portion of them I may represent, I understood the way signed
     arithmetic was defined and it made sense to me. I'm not sure I'm
     excited about making expressions that mix signs illegal. Having it
     behave the same way as vector expansion made sense then and still
     does now. As a user, I like the consistency of the two rules. They
     may be weird, but since they're the same, once I've understood the
     one - I understand both. I'm not opposed to rethinking the sign
     rules but I'd like them to match something else in Verilog.
     And, no, making it illegal rubs me the wrong way - it's not very
     Verilog, so that wouldn't get me excited either.
     
     I'm not trying to point fingers here, I'm just saying that regardless
     of how well it was documented, our intent was for sign rules to
     follow the vector width rules. And strange as it may seem - I liked
     it that way. That's why I approved it in the standard... I'd just like
     to see it cleaned up to document what we intended when we were
     refining the proposal.
     
     Stefen
     
     At 05:40 PM 5/3/2004 -0700, Alec Stanculescu wrote:
    > So, what do you say to the proposal to make illegal any complex expression
    > that uses both signed and unsigned. This could simplify the LRM
    > enormously and users would see only benefits from this, since they
    > would not loose any modeling capabilities they currently have, and
    > models would be portable across tools.
     

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