RE: enhancement/350: PROPOSAL - Deprecate configs in Verilog source

From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Mon May 17 2004 - 15:49:59 PDT

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    Hi, All -

    One minor point of clarification.

    "next " is not a new SystemVerilog 3.1a keyword. "logic" and "bit" are new
    keywords that were added to SystemVerilog 3.0.

    I do like the idea of proposal 287 because it allows me to make entire
    modules fully keyword-backward compatible without requiring different
    command line switches, forced separate compilation and different
    methodologies for different simulators.

    I fear that one vendor may require separate compilation of the Verilog-1995
    modules with a vendor-specific command line switch while another vendor
    permits full model compilation with one command file. I don't want to break
    command files up just to satisfy separate compilation by one vendor. I
    would prefer that the tool to break up the files for me based on compiler
    directives.

    Regards - Cliff

    At 07:44 AM 5/17/2004, Michael McNamara wrote:
    >And yet we are also looking at the fact that "logic" and "bit" and
    >"next" and hundreds of other words have been approved for use with an
    >unconstrained scope as identifiers for the last twenty years in
    >Verilog, and yet we have a proposal to take these hundreds of key
    >words away from the users; making their existing models and tools which
    >support them obsolete.
    >
    >I suggest it might be useful for you to study proposal 287 which looks
    >to provide a method to reconcile these issues in a beneficial manner
    >for all parties.
    >
    >Michael McNamara, Chairman, IEEE 1364 Working Group <mac@verilog.com>
    > Sr VP Technology, Verisity Design <mac@verisity.com>
    > W 650-934-6888 F 650-934-6893 M 408-930-6875

    ----------------------------------------------------
    Cliff Cummings - Sunburst Design, Inc.
    14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
    Phone: 503-641-8446 / FAX: 503-641-8486
    cliffc@sunburst-design.com / www.sunburst-design.com
    Expert Verilog, SystemVerilog, Synthesis and Verification Training

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