From: Steven Sharp (sharp@cadence.com)
Date: Fri Jun 11 2004 - 10:10:00 PDT
The following reply was made to PR errata/582; it has been noted by GNATS.
From: Steven Sharp <sharp@cadence.com>
To: etf-bugs@boyd.com
Cc:
Subject: errata/582: another inquiry
Date: Fri, 11 Jun 2004 13:07:48 -0400 (EDT)
I am forwarding this query, which shows someone else concerned with this
issue.
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Date: Thu, 10 Jun 2004 06:48:27 +0000
From: Pooja Maheshwari <mpooja@agere.com>
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To: Steven Sharp <sharp@cadence.com>, stuart@sutherland-hdl.com
CC: Pooja Maheshwari <mpooja@agere.com>
Subject: Queries in Verilog-2001 std.
Hello Steve/Stuart,
I found some discrepancy in config section ( Clause 13 of
IEEE1364-2001).
In config section, design statement and config_rule_statements are
allowed.
According to BNF ( in tables 13.4 - 13.9 )
(*) a ";" is expected after design statement.
(*) no ";" should be there after config rule statement
(default liblist clause, instance clause, etc.)
In examples,
(*) 13.3.2 ";" is used after both design and config rule
statements ( config bot, config top).
(*) 13.5.2 ";" is not used in design statement but used
in config rule statement ( config cfg1, cfg2, etc.).
My question is, whether ";" should be there after design statement,
or after "config rule statement" or both.
Thanks,
Pooja
------------- End Forwarded Message -------------
Steven Sharp
sharp@cadence.com
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