Re: where to send Verilog spec issues?

From: Shalom.Bresticker@freescale.com
Date: Fri Aug 06 2004 - 03:51:49 PDT

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    Hi, Brian.

    Are you on the ETF email list?

    What you are describing sounds like it comes under the general category of
    issue #57, which is a placeholder I filed for a number of related issues that
    I and others brought up at least as far back as 1995 and came up a number of
    times since then in various variations and with respect to various aspects.

    Unfortunately, I never got around to filling in the details of the issues
    which were brought up. Maybe this mail will not push me to do that.

    Send your document to the etf mail list if you are on it, or to me and I will
    forward it, and we will have our webmaster get it into the database in the
    proper form. A PDF version might be useful, too.

    Thanks,
    Shalom

    On Thu, 5 Aug 2004, Brian Mcminn wrote:

    > Hi Shalom,
    >
    > I was a lurker on the Verilog 2000 list several years ago and just
    > re-joined the current ongoing discussions.
    >
    > One of my co-workers has taken a very critical look at the fundamental
    > definition of Verilog's execution model as defined by the spec and
    > come up with some very good questions along with some proposed answers
    > to those questions. Unfortunately, he has written all of this up in a
    > 10 page Word document rather than a short and sweet bug report.
    >
    > I have searched through the current errata and have not found anything
    > that looks like the issues he is raising. I also have not found an
    > errata that begins with a long Word document either.
    >
    > We still need to make certain that our supplier is comfortable with us
    > referencing their exact implementation decisions in a spec issue but
    > even if they say we can, how should we proceed with an errata that is
    > more of a paper than a bug report? If it makes a difference to your
    > answer, the issues that he has addressed involve the enabling of
    > events and the suspension of enabled processes.
    >
    > Thanks,
    > Brian McMinn 

    -- 
Shalom Bresticker                        Shalom.Bresticker @freescale.com
Design & Reuse Methodology                           Tel: +972 9  9522268
Freescale Semiconductor Israel, Ltd.                 Fax: +972 9  9522890
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