errata/652: 14.2.4.3, Example 2: path conditions not unique?

From: Shalom.Bresticker@freescale.com
Date: Wed Feb 16 2005 - 11:40:00 PST

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    >Number: 652
    >Category: errata
    >Originator: Shalom.Bresticker@freescale.com
    >Description:

    14.2.4.3 says that "Different delays can be made to the same edge-sensitive
    path as long as ... the edge, condition, or both make each declaration
    unique".

    Then follows Example 2:

    "The following example shows four edge-sensitive path declarations. Note
    that each path has a unique edge or condition.

    specify
      ( posedge clk => ( q[0] : data ) ) = (10, 5) ;
      ( negedge clk => ( q[0] : data ) ) = (20, 12) ;

      if (reset)
        ( posedge clk => ( q[0] : data ) ) = (15, 8) ;
      if (!reset && cntrl)
        ( posedge clk => ( q[0] : data ) ) = ( 6, 2) ;
    endspecify"

    I don't see the uniqueness between the 1st and 3rd or 1st and 4th path
    declarations.

    The 1st is unconditional on the same path as the 3rd and 4th with the
    same edge, so it seems to overlap with both of them. 

    -- 
Shalom Bresticker                        Shalom.Bresticker @freescale.com
Design & Verification Methodology                    Tel: +972 9  9522268
Freescale Semiconductor Israel, Ltd.                 Fax: +972 9  9522890
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