errata/655: 2005D6, 7.1.6: ambiguities in instance array port connection rules

From: Shalom Bresticker (Shalom.Bresticker@freescale.com)
Date: Thu Mar 03 2005 - 04:50:00 PST

  • Next message: Steven Sharp: "Re: errata/654: 14.2.3: specify block edge-sensitive path description with polarity"

    The following reply was made to PR errata/655; it has been noted by GNATS.

    From: Shalom Bresticker <Shalom.Bresticker@freescale.com>
    To: etf-bugs@boyd.com
    Cc:
    Subject: errata/655: 2005D6, 7.1.6: ambiguities in instance array port connection
     rules
    Date: Thu, 03 Mar 2005 15:00:00 +0200

     Kausik Datta <kausikd@cal.interrasystems.com> wrote:
     
    > Is it possible to bind individual instances of an array of instance via
    > configuration to different modules.
    > If so then how to explain the last two points of the terminal connection
    > rules of the array of instances.
    >
    >
    > The terminal connections for an array of instances shall follow these
    > rules:
    > - The bit length of each port expression in the declared instance-array
    > shall be compared with the bit
    > length of each single-instance port or terminal in the instantiated
    > module or primitive.
    > - For each port or terminal where the bit length of the instance-array
    > port expression is the same as the
    > bit length of the single-instance port, the instance-array port
    > expression shall be connected to each
    > single-instance port.
    > - If bit lengths are different, each instance shall get a part-select of
    > the port expression as specified in
    > the range, starting with the right-hand index.
    > - Too many or too few bits to connect to all the instances shall be
    > considered an error.
     
     I answered:
     
    > It means for example, that if you connect an 8-bit vector to an array of 4
    > instances, then each instance will connect to 2-bits of the vector (e.g,
    > [0:1], [2:3], [4:5], [6:7]).
    >
    > However, if you connect a 7-bit vector to an array of 4 instances, it will
    > be an error.
     
     Steven Sharp wrote:
     
    > >Is it possible to bind individual instances of an array of instance via
    > >configuration to different modules.
    >
    > At present, no. The BNF for configurations only allows identifiers for
    > the instance name, with no bracketed index. So it isn't possible. This
    > missing capability is filed in erratum 372.
    >
    > However, I assume that your concern is with the situation where different
    > instances in an array of instances have different port widths. This is
    > possible without using configurations and different module definitions.
    > Simply use a module definition where the port width is parameterized, and
    > use a defparam to change the width of the port on one of the instances.
    >
    > >If so then how to explain the last two points of the terminal connection
    > >rules of the array of instances.
    >
    > I would interpret it as follows. There are two possibilities for a
    > connection to an array of instances. The port expression can match
    > the width of the port on each instance, in which case the port expression
    > is connected to the port on each instance. Or the port expression can
    > match the sum of the widths of the ports on all instances, in which case
    > appropriate width part-selects of the port expression are connected to
    > the port on each instances. Any other case is illegal.
    >
    > If different instances have different port widths, it is clearly impossible
    > for the port expression to match the width of the port on each instance.
    > The port expression will mismatch one or more of the instance port widths.
    > If it does not match the total width of the ports on all instances, then
    > this must be illegal. It cannot be connected in either of the two possible
    > ways without having too many or too few bits, which makes it illegal. This
    > would be a very good thing to test in a standards compliance suite, as it
    > is obscure enough to have been implemented incorrectly.
     
     
    > I just tested this in NC-Verilog. It produces an error if the ports in
    > different instances of an instance array have different widths. This is
    > not how I would have interpreted the text, but can be argued. The rules
    > do refer to "the bit length of the single-instance port", which could be
    > interpreted as requiring a single consistent bit length for the port in
    > all the single instances. I interpreted it less strictly.
     
     So one ambiguity is what happens when the instances have different port
     widths due to configurations or defparams.
     
     Another potential ambiguity is the following case: suppose I have 4 instances
     of a module with a 2-bit port, and I connect to it a 4-bit vector. The
     intended behavior is that the number of bits required in the array connection
     is either 2-bits, like each instance port width, or 8 bits (4x2).
     
     However, the wording could potentially be interpreted as saying that it
     connects 1 of the 4 bits in that case to each instance (4 bits divided by
     4 instances) and that the intent of the last rule is to generate an error if
     the vector width is not divisible by 4, not allowing to connect the same
     number of bits to each instance.
     

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