Re: enhancement/350: Proposal to deprecate configs in Verilog source files

From: Shalom.Bresticker@freescale.com
Date: Wed Apr 06 2005 - 19:40:00 PDT

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    The following reply was made to PR enhancement/350; it has been noted by GNATS.

    From: Shalom.Bresticker@freescale.com
    To: Brad Pierce <Brad.Pierce@synopsys.com>
    Cc: etf-bugs@boyd.com
    Subject: Re: enhancement/350: Proposal to deprecate configs in Verilog source
     files
    Date: Thu, 7 Apr 2005 05:52:12 +0300 (IDT)

     The BNF may seem to not allow it,
     but some users and vendors have interpreted the LRM to not forbid it,
     and they have done it.
     
     Even Steven wrote that he believes the original intention was to allow it.
     (See May 19, 2004 mail (exactly one year after the original submission!))
     
     Shalom
     
     
     On Wed, 6 Apr 2005, Brad Pierce wrote:
     
    > The following reply was made to PR enhancement/350; it has been noted by GNATS.
    >
    > From: "Brad Pierce" <Brad.Pierce@synopsys.com>
    > To: <etf-bugs@boyd.com>
    > Cc:
    > Subject: Re: enhancement/350: Proposal to deprecate configs in Verilog source files
    > Date: Wed, 6 Apr 2005 14:38:42 -0700
    >
    > Steven
    >
    > You write --
    > >Verilog-2001 allows configs to appear in either Verilog
    > >source files, or the library map file.
    >
    > The current BNF doesn't allow this.
    >
    > -- Brad
    >
    >
    >
    >
    >
     
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