Re: errata/659: $fullskew bugs

From: Shalom.Bresticker@freescale.com
Date: Fri Apr 15 2005 - 06:10:00 PDT

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    The following reply was made to PR errata/659; it has been noted by GNATS.

    From: Shalom.Bresticker@freescale.com
    To: etf-bugs@boyd.com
    Cc: yonghao@cadence.com, roberts@cadence.com, elkind@cadence.com
    Subject: Re: errata/659: $fullskew bugs
    Date: Fri, 15 Apr 2005 16:28:41 +0300 (IDT)

     In the hope of getting something passed, I submit this preliminary
     proposal, which incorporates Yonghao's and my proposed rewordings and
     some further edits. It still leaves some issues unresolved, most
     notably the role of the remain_active_flag in event-based mode.
     As such, it still leaves Case 3 in the example, although it currently
     describes exactly the same behavior as Case 2.
     The diagram also needs to be replaced with Yonghao's corrected version.
     
     PROPOSAL: In 15.3.3, "$fullskew", CHANGE the text from
     text paragraph 3 to the end of the subclause with the following:
     
     
     $fullskew is identical to $timeskew except the reference and data events can transition in either order. The first limit is the maximum time by which the data event can follow the reference event. The second limit is the maximum time by which the reference event can follow the data event.
     
     The reference event is the timestamp event and the data event is the timecheck event when the reference event precedes the data event. The data event is the timestamp event and the reference event is the timecheck event when the data event precedes the reference event.
     
     The $fullskew timing check reports a violation only in the following case, where limit is set to limit1 when the reference event transitions first, and to limit2 when the data event transitions first:
     
     (timecheck time) - (timestamp time) > limit
     
     Simultaneous transitions on the reference and data signals shall never cause $fullskew to report a timing violation, even when the skew limit value is zero.
     
     The default behavior for $fullskew is timer-based (event based flag not set).
     A violation shall be
     reported immediately upon elapse of the time limit after the timestamp event if
     a timecheck event does not occur in this time, turning the timing check dormant.
     However, if a timecheck event does occur within the time limit, then no
     violation is reported and the timing check turns dormant immediately.
     
     A second timestamp event occurring within the time limit starts a new
     timing window that replaces the first one, with the following exception:
     If a false condition
     associated with the timestamp event is detected, and the timing check is
     active, then the timing check turns dormant.
     If the timestamp event has
     no condition or has a true condition, and the timing check is dormant,
     then the timing check is activated.
     
     A reference event or data event is a timestamp event and starts a new timing
     window, unless it is a timecheck event occuring within the time limit after a
     preceding timestamp event.
     
     In the timer-based mode, the remain active flag is ignored.
     
     The $fullskew check's default timer-based behavior can be altered to event-based using the event based flag.
     In this mode, $fullskew is similar to $skew, in that a violation is reported
     not upon elapse of the time limit after the timestamp event (as in timer-based
     mode), but rather if a timecheck event occurs after the time limit. Such an
     event ends the first timing window and immediately begins a new timing window,
     where it acts as the timestamp event of the new window. A timecheck event
     within the time limit ends the timing window, turns the timing check dormant,
     and no violation is reported.
     
     Example:
       $fullskew (posedge CP &&& MODE, negedge CPN, 50, 70, event_based_flag, remain_active_flag);
     
     Case 1: Event based flag not set.
     
     The transition at A of CP while MODE is true begins a wait for a negative transition on CPN, and a violation is reported at B as soon as a period of time equal to 50 time units has passed. This resets the check and readies it for the next active transition.
     
     A negative transition on CPN occurs next at C, beginning a wait for a positive transition on CP while MODE is true. At D a time equal to 70 time units has passed without a positive edge on CP while MODE is true, so a violation is reported and the check is again reset to await the next active transition.
     
     A transition on CPN at E also results in a timing violation, as does the transition at F, because even though CP transitions, MODE is no longer true. Transitions at G and H also result in timing violations, but not the transition at I, because it is followed by a positive transition on CP while MODE is true.
     
     Case 2: Event based flag set, remain active flag not set.
     
     The transition at A of CP while MODE is true begins a wait for a negative transition on CPN, and a violation is reported at C on CPN because it occurs beyond the 50 time unit limit. This transition at C also begins a wait of 70 time units for a positive transition on CP while MODE is true. But for transitions on CPN at C through H there is no positive transition on CP while MODE is true, and so no timing violations are reported. The transition at I on CPN begins a wait of 70 time units, and this is satisfied by the positive transition on CP at J while MODE is true.
     
     Case 3: Event based flag and remain active flag both set.
     
     The transition at A of CP while MODE is true begins a wait for a negative transition on CPN, and a violation is reported at C on CPN, and it shall also begin a wait for a positive transition on CP while MODE is true. No such transition on CP ever takes place after CPN transitions C through H, but no violations are reported because CP never experiences a positive transition while MODE is true. Transition I also reports no violation because a positive transition at I on CP while MODE is true occurs within the 70 time unit skew limit.
     
     --
     Shalom.Bresticker @freescale.com Tel: +972 9 9522268
     Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890
     POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 5441478
       
     

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