RE: FW: New Mantis Issue #667 for V-1364

From: Dave Rich (dave_59@yahoo.com)
Date: Wed Apr 20 2005 - 18:28:30 PDT

  • Next message: Steven Sharp: "Re: FW: New Mantis Issue #667 for V-1364"

    Steve,

    Evaluating a sequential UDP with an initial statement is exactly like
    variable initialization in SystemVerilog. Its output has the initial
    value at the start of simulation.

    I am thinking of language like:

    All primitives, UDPs, implicit and explicit continuous assignment shall
    be evaluated at least once before the end of simulation time 0. Before
    time 0 includes during elaboration if all inputs to such constructs are
    constant expressions.

    Dave

    --- Steven Sharp <sharp@cadence.com> wrote:
    > Shalom wrote:
    > >Other than sequential UDPs, when is it wrong for primitives to
    > evaluate
    > >at time 0? If you already mentioned this, I'm sorry, I forgot.
    >
    > I haven't described it before, because I didn't want to divert the
    > discussion further. I know of two situations. For one of them, it
    > is
    > hard to define what the "correct" behavior would be, because it
    > requires
    > a UDP that is not a physically realizable device. However,
    > evaluation
    > at time zero would cause behavior different from Verilog-XL.
    >
    > The other is sequential UDPs with initial values for the state. But
    > as
    > Dave Rich pointed out, if you need to evaluate combinational UDPs at
    > time
    > zero, then you also need to evaluate sequential UDPs at time zero.
    > Sequential UDPs can have level-sensitive inputs, which have a
    > combinational
    > path to the output. If you don't need to evaluate those, then you
    > don't
    > need to evaluate combinational UDPs either.
    >
    > >I agree that in most cases, terminal connections work like port
    > connections,
    > >but it needs to be stated. However, one exception, I think, is
    > terminal
    > >connections of switch-level primitives, where port collapsing on
    > input
    > >terminals, where possible, is required, not just optional. This is
    > because
    > >these primitives preserve strength information.
    >
    > That is a valid point, and a good way of describing it. These
    > primitives
    > do allow port expressions and insert implicit continuous assignments
    > if
    > they are not nets. However, they must not insert a continuous
    > assignment
    > for a 1-bit net connected to a data input, since those must preserve
    > strength for the switch to function properly.
    >
    > Note that we are only discussing the unidirectional switches here.
    > The
    > bidirectional ones have inout data terminals, which can only be
    > connected
    > to 1-bit nets.
    >
    > Steven Sharp
    > sharp@cadence.com
    >
    >

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