IEEE 1364 Errata Task Force (ETF) Mailing List Archives
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Starting: Mon Jul 01 2002 - 07:17:46 PDT
Ending: Tue Oct 04 2005 - 16:11:56 PDT
- "always" block)]
- $fullskew
- $skew/$timeskew
- $timeskew
- %s format question in $display
- (no subject)
- (POSTED) Minutes of the February 23, 2004 IEEE 1364 WG meeting
- (Revised) Minutes of August 12, 2002 IEEE 1364 WG & ETF
- 12.2.1: question on defparams in array of instances
- 1364 1995 vs. 2001 comparison
- 1364 Ballot Comment Review
- 1364 Ballot Comment Review meeting
- 1364 ballot response meeting tomorrow
- 1364 database update
- 1364 editorship
- 1364 errata review #51, 53, 54, 56
- 1364 issue 140 and negative exponents
- 1364 mantis issues
- 1364 Meeting (telecon) on Wednesday, 4/27 at noon EDT
- 1364 Minutes - Mantis 680 Resolved
- 1364 port definition question
- 1364 reflector
- 1364 vs. Verilog-XL
- 1364-2001 bnf changes
- 1364-2001 Cliff version
- 1364-2001 comparison between 1ed and 2ed
- 1364-2001 frame source files
- 1364-2001 issues
- 1364-2001b to 1364-1995 compare files
- 1364-2001c edits
- 1364-2001c index
- 1364-2005 Draft 4 comments due on Thursday
- 1364-2005 Draft2 posted
- 1364-2005 intro, index
- 1364.1 pragmas
- 1364.1: ROM and RAM modeling
- 14.2.4.3 grammar error
- 19.4, example 2, last two $display lines
- 1ed vs. 1ed
- 2.7.4 system tasks and functions
- 23.9: Does 1364-2001 standardize -f command-line argument?
- 4.5: sign extension and bit-length rules not clear enough
- [Fwd: 23.9: Does 1364-2001 standardize -f command-line argument?]
- [Fwd: 237 issue]
- [Fwd: [sv-ec] Scheduling Semantics proposal]
- [Fwd: BTF List Compiled by Cliff Cummings, Chairperson of BTF -October 10, 2001]
- [Fwd: Clause 8: IEEE-SA Standards Board Operations Manual] - on errata and corrigenda
- [Fwd: Differences between VerilogXL and VCS for delays used with vectors]
- [Fwd: Draft 5: $sformat]]
- [Fwd: Email (job) change for me]
- [Fwd: enhancement/17: 12.1.3 is not clear enough about permitted defparam usage]
- [Fwd: enhancement/90: 19:unclear which compiler directives must be alone on line]
- [Fwd: errata/10: typo p.84]
- [Fwd: errata/123: PROPOSAL - Fwd: identifier and indexing syntax]
- [Fwd: errata/15: 19.4: typo + confusing]
- [Fwd: errata/310: PROPOSAL - wrong or poor xrefs]
- [Fwd: errata/36: Section 9.7.3: unfinished sentence]
- [Fwd: errata/497: add glossary section]
- [Fwd: ETF Minutes October 21, 2002 - comments]
- [Fwd: ETF Minutes October 21, 2002]
- [Fwd: evaluation order question]
- [Fwd: fix fixes for etfpassed issues]
- [Fwd: Fwd: comments and remarks referring to the System-Verilog 3.0LRM]
- [Fwd: Generate proposal]
- [Fwd: hierarchical_identifier]
- [Fwd: Initial proposal for "granularity of resolution"]
- [Fwd: Minutes of the October 7, 2002 meeting of the 1364 Working Group] - resend
- [Fwd: Part 6, IEEE Standards Companion] - on interpretations
- [Fwd: Sugar LRM -- more flaws in clocked semantics]
- [Fwd: tomorrow's etf conference call]
- [Fwd: Updated(3) FileIO proposal (adds %u, %z`, $swrite & $sformat)]
- [Fwd: VCS vs Verilog XL -- Differences in the Handling of Real Numbers]
- [Fwd: Verilog reaches a critical crossroads]
- [P1800] p1364-2005 introduction and clause numbering
- [P1800] SystemVerilog (P1800) and Verilog (P1364) Draft Documents Available
- [P1800] Updated Database
- [sv-ac] The SV Chairs Process for SV 3.1 LRM standardization (fwd)
- [sv-bc] Keywords
- [sv-bc] potential command line option
- [sv-bc] Proposal for SV-BC-34A Namespaces (fwd)
- [sv-bc] SV-EC Proposal: Implicit Universal Data Type - Cliff Cummings to champion the proposal
- [sv-cc] Last 2 email votes for 1364
- [sv-cc] Mantis #658 (1364 Notes proposal) updated
- [sv-cc] P1364 Draft 7 (preliminary) available for review
- [sv-cc] P1364 meeting minutes and email ballot
- [sv-ec] Accellera SystemVerilog 3.1A Focus And Plans
- [sv-ec] ERR-4
- [sv-ec] fork..join_none/join_any and automatic variables
- [sv-ec] Handling of escaped identifiers.
- `unconnected_drive and `celldefine -- IEEE 1364-2001 Sections 19.1, 19.6 and 19.9
- A big Thank You for all of your effort of 1364-2001 Version C
- A proposal for variable width floating point in Verilog 200X
- A volunteer for generates
- Accellera's decision on Two Verilogs
- Action item for generate
- adding discussion/proposals to existing issue
- agenda for 1/13 meeting?
- Agenda for 10/7/02 ETF meeting
- Agenda for 2/10 ETF Meeting
- Agenda for Meeting Monday 12/2/02
- Agenda for Monday's ETF meeting
- Agenda for the 1/27/03 ETF Meeting
- Agenda for the 12/16/02 ETF Meeting
- Agenda for today's ETF meeting
- Agenda of IEEE 1364 Meeting of February 23, 2004
- always_comb semantics
- Amended minutes of 2003_8_11 meeting
- Amending the generate proposal
- Amendment to ETF-9
- Analysis of 11/18 assigned errata
- Annexes C and D
- Another difference between P1364/D6 and IEEE 1364-2001
- another sign-extension issue
- another sign-extension issue version=2.63
- Appendix C
- assign out = mem[index] ;
- Attribute instances
- Aug 11, 2003 Minutes for IEEE 1364 ETF
- August 12 - Meeting Reminder
- Bad syntax in example -- IEEE 1364-2001 Section 12.3.4
- Blame it on IEEE!
- BNF question
- BOUNCE etf@boyd.com: Non-member submission from [Dave Rich <David.Rich@synopsys.com>]
- BOUNCE etf@wa.boyd.com: Non-member submission from ["Fitzpatrick, Tom" <tom_fitzpatrick@mentorg.com>]
- Boyd Technology - Database
- boyd.com
- boyd.com down temporarily...
- Boyd.com is moving - database & mail reflectors going offline
- BTF meeting?
- bug reports
- Cadence is completely off the net!!!
- Call for nominations for 1364 VSG officer positions
- Call for participation: IEEE 1800 CC - errata committee
- call tomorrow
- Cancel Monday's meeting
- Cancelling Monday's meeting
- casez
- Categorization of issues 20. 21. 22. 23
- Categorization of issues 32, 33, 34, 36
- Categorizing errata
- Change summary document for 1364-2001c
- cleaning up 1364-2001
- Cliff may have email problems for up to 2 weeks
- Cliff will only be on the call for a short time this morning
- Cliff's Config Proposal #4 (simplification)
- close etf 658
- closed "mistaken" issues
- Combinational sensitivity question
- Comment on Issue 211
- comment syntax
- Comments concerning Accellera-IEEE Verilog Standards Statemen t
- Comments concerning Accellera-IEEE Verilog Standards Statement
- Comments from Andy
- Comments on events at NesCom meeting
- Committment to assign Copyright of System Verilog to IEEE-1364
- Conference call
- Config facts & Dangerous Precedent - was: potential command line option
- config name space
- Config-keyword work-around - was: potential command line option
- Configs & Modules in separate files - was: potential command line option
- Configs Intent - was: potential command line option
- Configs proposal version #1
- Configurations issues and questions
- Configurations Proposal Version 2
- connecting constant to inout port
- Contact Information
- continuous assignment LHS
- Corrected Minutes for June 14, 2000: IEEE-1364 Working Group
- Corrected minutes of 07/28/2003 meeting of the IEEE 1364 group
- dan jacobi's comments
- Database access now working from web...
- David Russinoff paper about 1364 Scheduling (cf. issue #57)
- db entry classification 'clarification'
- db updates
- December 1, 2003 Minutes for IEEE 1364 ETF
- Defparam & module instance parameter assignment
- defparams
- Directions on generate
- do configuration statements end with semicolon?
- Draft 1364-2001 C
- draft 4 typo
- Draft Minutes of June 23rd IEEE 1364 Working Group Meeting
- duplicate issues
- editorial errata sub-task force
- edits to etfpassed issues
- election of officers P1364 is now ended.
- email eft bug submission
- Email issues passed from email vote
- email votes
- enhancement/17: 12.1.3 is not clear enough about permitted defparam usage
- enhancement/183: allow reverse part-select [lsb:msb]
- enhancement/191: Add localparam to ANSI-type param list
- enhancement/201: module instance without parentheses
- enhancement/220: $random functions not 64-bit portable
- enhancement/240: Allow initializing declarations in named blocks, tasks, functions
- enhancement/252: Need to reserve range of values for future additions to VPI
- enhancement/280: PROPOSAL - turn xrefs blue and/or underlined
- enhancement/280: turn xrefs blue and/or underlined
- enhancement/287: `compatibility - backward compatibility compiler directives
- enhancement/287: `compatibility - backward compatibilitycompi lerdirectives
- enhancement/287: `compatibility - backward compatibilitycompiler directives
- enhancement/287: `compatibility - backward compatibilitycompilerdirectives
- enhancement/293: : variable width floating point in Verilog 200X
- enhancement/297: Allow instance array connected to data array
- enhancement/298: Add field widths to print formats
- enhancement/2: Enhancement/2: negative genvars allowed
- enhancement/2: PROPOSAL - Allow negative genvars
- enhancement/342: Deprecate the PLI 1.0 sections
- enhancement/350: BNF issues
- enhancement/350: PROPOSAL - Deprecate configs in Verilog sour ce
- enhancement/350: PROPOSAL - Deprecate configs in Verilog source
- enhancement/350: Proposal to deprecate configs in Verilog source files
- enhancement/354: PROPOSAL - There is no $feof function
- enhancement/354: PROPOSAL revised and passed by BTF
- enhancement/354: There is no $feof function
- enhancement/357: Proposal for Extending Verilog Data Types
- enhancement/358: Proposal for IP Encryption Format for Verilog
- enhancement/359: constraint library
- enhancement/359: Proposal for Randomization and Constraints
- enhancement/378: add Quick Reference
- enhancement/381: ANALYZED - table model system task
- enhancement/383: add inherited connections
- enhancement/384: add mfactor parameters
- enhancement/384: mfactor
- enhancement/384: mfactors
- enhancement/384: mfactors (fwd)
- enhancement/385: interconnect net that resolves to type
- enhancement/386: ANALYZED - user defined functions on instantiations
- enhancement/387: calling system tasks at elaboration
- enhancement/387: editing error in implementing proposal
- enhancement/387: enhancement/387: calling system functions at elaboration
- enhancement/387: PROPOSAL - calling system tasks at elaboration
- enhancement/388: genvar in behavior
- enhancement/389: dynamic param
- enhancement/38: PROPOSAL - Add examples of trireg charge strength declarations to 3.4.1
- enhancement/390: math functions
- enhancement/390: PROPOSAL - add math functions
- enhancement/390: PROPOSAL - as amended and passed by BTF
- enhancement/390: PROPOSAL - math functions
- enhancement/391: wreal type
- enhancement/392: ANALYZED - break/continue statements to break out of loops
- enhancement/392: break/continue statements to break out of loops
- enhancement/392: PROPOSAL - break/continue statements to break out of loops
- enhancement/400: Reduce arithmetic operators x-pessimism
- enhancement/401: Reduce relational operators x-pessimism
- enhancement/404: add wildcards for equality operators
- enhancement/405: add ranges for equality operators
- enhancement/406: add lists for equality operators
- enhancement/409: lists in part-selects
- enhancement/411: extend operators to vectors and arrays
- enhancement/414: rotate operator
- enhancement/419: reconsider for 1364-2005 proposals made for 1364-2001
- enhancement/421: move 17.9.3 to Annex
- enhancement/422: extend $dumpvars to exclude a signal or module
- enhancement/427: combine 4.1.3 and 4.1.6
- enhancement/429: Fwd: Enhancement
- enhancement/430: Add `pragma compiler directive
- enhancement/430: PROPOSAL - Add `pragma compiler directive
- enhancement/431: Add language defined attribute capability
- enhancement/431: PROPOSAL - Add language defined attribute capability
- enhancement/432: Add shared declaration mechanism to Verilog - packages
- enhancement/432: PROPOSAL - Add shared declaration mechanism to Verilog - packages
- enhancement/435: Verilog transaction recording extensions
- enhancement/436: Non-blocking event trigger
- enhancement/436: PROPOSAL - Non-blocking event trigger
- enhancement/437
- enhancement/437: A proposal for adding verification test bench specific enhancements
- enhancement/437: please close this issue, it duplicates 455
- enhancement/442: Add auto-increment and auto-decrement statements
- enhancement/442: PROPOSAL - Add auto-increment and auto-decrement statements
- enhancement/443: Allow modules to be passed through ports
- enhancement/447: `ifdef boolean combination of identifiers
- enhancement/448: extend new file i/o to allow combinations of fd's
- enhancement/450: : Compressed Assignment Satements
- enhancement/451: review Annex C and D
- enhancement/453: add `undefineall functionality
- enhancement/455: Fwd: pdf file attachment for BTF en#455
- enhancement/455: Jeda Verification Enhancements
- enhancement/457: extend index to complete 1364-2001
- enhancement/458: extend index to cover 1364-2005 enhancements
- enhancement/461: Proposal: Eliminate IEEE Enhancements Submis sion Deadline
- enhancement/461: Proposal: Eliminate IEEE Enhancements Submission Deadline
- enhancement/466: Separate Compilation
- enhancement/473: Preprocessor directive for user defined preprocessor
- enhancement/475: Support a container to define how to interface to a set of signals.
- enhancement/476: Standard reporting mechanism for functional errors/warnings, etc.
- enhancement/477: Provide an assertion statement with the capability to use industry standard property specification.
- enhancement/477: Provide an assertion statement with thecapabilityto use industry standard property specification.
- enhancement/478: Provide part selection of a structure
- enhancement/481: define standard preprocessor
- enhancement/482: add standard way to define functional coverage points
- enhancement/492: add lists of figures, tables, syntaxes
- enhancement/496: Want safe VPI methods to call.
- enhancement/502: Dynamic Values on attributes
- enhancement/502: enhancement/502: Dynamic Values on attributes
- enhancement/508: add arrays of `defines
- enhancement/509: add arrays of parameters
- enhancement/514: config file should support module and primitive arrays
- enhancement/519: system function to get signal strength
- enhancement/520: 3.3.2: deprecate "scalared" and "vectored" keywords
- enhancement/528: SDF should support $timeskew and $fullskew
- enhancement/529: Add "bidirectional skew" timing check
- enhancement/532: new, binary dump format in addition to vcd
- enhancement/537: allow unsized numbers and integer variables in concatenations
- enhancement/538: enhancement/538: tentative resolution
- enhancement/542: non_zero_unsigned_number and non_zero_decimal_digit is not supported by industry standard tools
- enhancement/542: PROPOSAL - non_zero_unsigned_number and non_zero_decimal_digit is not supported by industry standard tools
- enhancement/545: 4.2.1, 4.2.2: out of bounds addressing
- enhancement/547: define size zero replication constant
- enhancement/547: PROPOSAL - define size zero replication constant
- enhancement/548: support SDF RETAIN?
- enhancement/558: allow multidimensional arrays of modules
- enhancement/565: find way to embed PSL
- enhancement/571: review explicit restrictions in LRM
- enhancement/572: multidimensional instance arrays
- enhancement/573: loops within concatenations?
- enhancement/577: tables of BNF non-terminal references
- enhancement/580: Add some system functions for use in constant expressions
- enhancement/585: parameterized task/function extensions
- enhancement/587:
- enhancement/588: Add ranges to case_item expressions
- enhancement/589: x-pessimism for if statements
- enhancement/590: vector version of ?: operator
- enhancement/593: Continuous assignment case expressions
- enhancement/594: Allowing parameters to define the length of a constant
- enhancement/595: Ability to initialize variables to 0, 1, or random instead of X
- enhancement/61: PROPOSAL - add enumerated data type
- enhancement/62: PROPOSAL - add record/structure data type
- enhancement/640: Add 'uwire' net type to enforce single-driver restriction
- enhancement/640: PROPOSAL - Add 'uwire' net type to enforce single-driver restriction
- enhancement/85: repeat event_control grammar ambiguity
- enhancement/90: 19:unclear which compiler directives must be alone on line
- errata
- errata (fwd) - URGENT!
- Errata 173, 174, 175, 176, 177, 178
- errata 9.8: "block statement" definition
- errata database
- errata for 1364-2001c
- ERRATA OPEN ISSUES
- Errata recommendations 28 - 31
- Errata request - clarification of scope and generate
- errata/100: output arguments of automatic tasks not initialized
- errata/100: PROPOSAL - 10.2: output arguments of automatic tasks not initialized
- errata/101: 17.10.1: $test$plusargs argument
- errata/101: PROPOSAL - 17.10.1: $test$plusargs argument
- errata/102: PROPOSAL - TOC goes only 1 level down
- errata/102: TOC goes only 1 level down
- errata/103: Index missing
- errata/103: PROPOSAL - Index missing
- errata/104: 3.2.2: typo
- errata/104: PROPOSAL - 3.2.2: typo
- errata/105: return value of automatic function not initialized
- errata/106: 4.1.8 Incorrect zero extend rules for equality operators
- errata/106: 4.1.8 Incorrect zero extend rules for relational and equality operat\
- errata/106: PROPOSAL - 4.1.8: Incorrect zero-extend rules for relational & equality operators
- errata/107: Config and module of same name in same library?
- errata/108: Only one default clause in config?
- errata/109: Errata 10.3.5: redundancy
- errata/109: PROPOSAL - Errata 10.3.5: redundancy
- errata/110: $dumpports for supply nets
- errata/111: How should $fread deal with partial data to a memory?
- errata/112: PROPOSAL - Section A.9.3: "arrayed_identifier" BNF rule
- errata/112: Section A.9.3: "arraye