SystemVerilog Data types

Feature Name: SystemVerilog Syntax
Integer Types shortint: 2-state, 16 bits, signed
int: 2-state, 32 bits, signed
integer: 4-state, 32 bits, signed
longint: 2-state, 64 bits, signed
byte: 2-state, 8 bits, signed or ASCII char
bit: 2-state (user can set size)
logic: 4-state (user can set size)
reg: 4-state (user can set size)
time: 4-state, 64 bits
Real types real (= C double)
shortreal (= C float)
Void types Only for functions and members of tagged unions
chandle Pointers passed using DPI
Event event name;
Enum enum [<type>] {<value_list>} name;
Packed Array <type> [<range>] name;
Unpacked Array <type> name [<range>];
Multi-D Array <type> name [<range>]{[<range>]};
User-defined Type typedef <type_decl> name;
Struct struct {<decl_list>} name;
Struct, packed struct packed {<decl_list>} name;
Union union {<decl_list>} name;
Union, packed union packed {<decl_list>} name;
Union, tagged union tagged {<decl_list>} name;
Automatic Variables automatic <type> name;
Signed Values <type> signed name;
Constant const [<type>] name;
Parameters (explicitly typed) parameter [<type>] name;
Parameter of type type parameter type name;
Local Parameters localparam [<type>] name;
String datatype string name [= value];
Event variable event name [= value];
Dynamic arrays <type> name [*];
 
name = new;
Associative arrays <type> name [[<type>]];
Queues <type> name [$[:<size>];
Alias alias lhs = rhs;
Class Definition class name;
 
<data_decls>;
 
[<constraint_decls>;]
  <method_decls>
;
endclass
Class Object
  (Instantiation)
class_name name [= new];
Subclasses class subname extends basename;
 
<data_decls>;
 
[<constraint_decls>;]
 
<method_decls>;
endclass
Dynamic Threads fork
  <statements>;
join all|any|
[none]
Built-in Classes semaphore name [= new];
mailbox
name [= new];
process
name [= new];
List
name [= new];
Random Variables rand|randc name;
Only valid for class/object data
Constraint Blocks constraint name
   
{<constraint_expr>};
Coverage Group Definition covergroup name [<event>];
  <coverage_spec>;
endgroup
Sequences sequence name [(<arg_list>)];
 
[<sample_expr>]
    <sequence_expr>;
endsequence
Properties property name [(<arg_list>)];
  [<type>
name;]
  <property_expr>
;
endproperty