IEEE 1364 Sub Task Force Lst2 Mailing List Archives
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Starting: Tue Apr 27 2004 - 18:37:29 PDT
Ending: Tue Oct 04 2005 - 16:12:19 PDT
- /bbs/pub/dasc/dasc-sc-list: DASC-SC: Call for vote on Revised P1
- /bbs/pub/dasc/dasc-sc-list: DASC-SC: result of vote on 1364 PAR
- 1364 BoF Meeting at the Design Automation Conference
- 1364 PAR approved
- 1364-2005 Draft 4 comments due on Thursday
- 1364-2005/d4 ?
- 1364@accellera.org
- [Fwd: Minutes of 11 June DASC-SC meeting]
- [Fwd: the IP address of the infected machine]
- [sv-ec] SystemVerilog Errata Technical Planning Meeting on June 3 -- Mentor Graphics (fwd)
- [sv-ec] SystemVerilog Technical Planning Meeting on June 3 -- San Jose (fwd)
- Accellera and DASC]
- Accellera Board Questions of IEEE 1364
- Accellera's decision on Two Verilogs
- Call for nomination]
- Call for nominations for 1364 VSG officer positions
- Call for participation: IEEE 1800 CC - errata committee
- Comments on events at NesCom meeting
- Confirming: Accellera Board Telecon, May 27, 7:00am Start Time
- Corrected Minutes for June 14, 2000: IEEE-1364 Working Group
- Correction to Stu Sutherland email re SystemVerilog and IEEE CAG
- dasc membership
- DASC presentation for telecon
- DASC-SC Motion
- DASC-SC: Call for vote on Revised P1364 PAR
- EDA vendor, Accellera moves place SystemVerilog at crossroads
- election of officers P1364 is now ended.
- Email to the list 1364@accellera.org
- Endorsements from Cliff Cummings - P1364 VSG electronic ballot
- errata/113: revised generate proposal
- FINAL CALL for nominations for 1364 VSG officer positions
- Fwd: SystemVerilog Errata Meeting on August 6
- FYI - 1076 WG considering entity, mixed membership
- Gateway Verilog Reference Manual Version 1.1a (March 1987)
- http://standards.ieee.org/board/nes/projects/1800.pdf
- IEEE 1364 Meeting underway
- IEEE SystemVerilog Working Group Meeting Agenda
- IEEE TAKES STEPS TO UNIFY WORK ON VERILOG® HDL STANDARD WITH A SINGLE WORKING GROUP
- IEEE unifies Verilog standards efforts
- Minutes of 1800
- Minutes of BTF meeting on May 17, 2004, 11:05 AM PDT.
- Minutes of the August 16, 2004 IEEE-1364 Working Group
- Minutes of the July 13, 2004 IEEE-1364 Working Group
- Minutes of the June 14, 2004 IEEE-1364 Working Group
- Minutes of the May 18, 2004 IEEE-1364 Working Group
- minutes posted, issues updated
- next meeting?
- No 1364 meeting on 1/10
- on expertise
- P1800 consideration at NESCOM
- P1800 meeting
- P1800 meeting restarting at 12:15 (Pacific time)
- p1800 par questions
- P1800 SystemVerilog WG F2F Meeting Agenda for August 9th
- P1800 SystemVerilog WG F2F Meeting August 9th
- Please Scan for Errors by 06/25/04
- Potential IEEE-SA Corporate Advi
- Project Authorization Request (PAR) Form
- revised 1364 PAR (fwd)
- spam trap tweak
- spam trap tweak (this time for sure)
- SystemVerilog will NOT be part of IEEE 1364
- Test
- test - please ignore
- Test of alias. Please confirm receipt.
- This is the P1364 VSG electronic ballot.
- Today's VSG meeting
- types of standards
- Updated - Minutes of the August 16, 2004 IEEE-1364 Working Group
- Verilog schism feared as Accellera bypasses IEEE 1364
- vsg call today?
- Yellow Journalism ?
- Your email to 1364@accellera.org
Last message date: Tue Oct 04 2005 - 16:12:19 PDT
Archived on: Tue Oct 04 2005 - 16:12:50 PDT
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