From: etf@boyd.com
Date: Fri Jan 30 2004 - 06:53:25 PST
In order to reconcile a 2 dimensional array of regs,
formerly known as a memory, with arrays of regs with more
dimensions, I propose the following changes:
Make the following changes to section 26.6.9:
- Change the definition enclosure "memory" to
a reference enclosure "reg array"
- Change the definition enclosure "memory word"
to a reference enclosure "reg"
- Add a label "vpiMemory" to the 1 to many iteration
from module and scope.
- Add a label "vpiMemoryWord" to the 1 to many iteration
from memory to memory word.
- Add a property to memory:
-> is a memory
bool: vpiIsMemory
Make the following changes to section 26.6.1:
- Change the reference enclosure "memory" to "reg array"
- Add a "vpiMemory" label to the 1 to many iteration to
memory.
Make the following changes to section 26.6.25:
- Remove the 2 memory word reference enclosures.
Make the following changes to section 26.6.42:
- Remove the memory reference enclosure.
Make the following changes to section 26.6.43:
- Remove the memory reference enclosure.
Add the following to annex G:
- Immediately after vpiModPathHasIfNone (line 482):
#define vpiIsMemory 73 /* A reg MDA is a memory */
See the diagrams at
http://www.verilog-2001.com/pli_errata/
See ptf341.pdf
Notes from proposer:
- The #define in the include file (annex G) may need
to be reconciled with other PTF items.
http://wa.boyd.com/cgi-bin/issueproposal.pl?cmd=view&database=default&pr=341
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